Modeling and Analysis of Substrate Coupling in Integrated Circuits by

Substrate coupling in integrated circuits is the process whereby parasitic current flow in the substrate electrically couples devices in different parts of the circuit. Higher levels of integration and higher frequencies of operation make the coupling more pronounced in modern circuit realizations. High levels of integration are desirable in several applications for reducing the overall power dissipation, reducing the number of components and lowering costs. Portable radio-receivers are an example of such an application. Electrical coupling in the substrate leads to undesirable interaction between devices which can degrade circuit performance. The degradation can manifest itself in several ways. In mixed analog-digital circuits, for example, the switching-noise generated by digital circuits can be coupled to the sensitive analog circuits through the substrate. Performance degradation due to substrate coupling can be addressed at the circuit-design stage by including accurate substrate models in circuit simulations. An efficient and elegant technique to model sub-strate coupling is presented in this dissertation. The technique uses a combination of the classical Green function approach and the Fast Fourier Transform. The speed of this technique makes it suitable for optimization of circuit layout for minimization of substrate coupling related effects. The nature of substrate coupling in different types of substrates has been analyzed. The effectiveness of isolation schemes, such as guard rings, in different types of substrates has also been presented. Several effects of substrate coupling on circuit performance have been identified and remedies have been suggested. Experimental verification of the substrate models has been performed.